GE-115 Emulator
An Emulator of the General Electrics GE-115 computer
pulse.c
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1 #include <stddef.h>
2 #include <stdlib.h>
3 #include <string.h>
4 #include "ge.h"
5 #include "signals.h"
6 #include "log.h"
7 
8 static void on_TO00(struct ge *ge) {
9  /* cpu fo. 115 */
10  ge->RIA0 = ge->RC00 && !ge->ALTO;
11  ge->RESI = ge->RC01;
12  ge->RIA2 = ge->RC02;
13  ge->RIA3 = ge->RC03;
14 
15  ge->RETO = RES01(ge);
16 
17  /* TODO: a "counter" with RAMO, RAMI should condition RIA0 */
18 
19  ge_log(LOG_CYCLE, " async: RC00: %d RC01: %d RC02: %d RC03: %d ALTO: %d\n",
20  ge->RC00, ge->RC01, ge->RC02, ge->RC03, ge->ALTO);
21 
22  ge_log(LOG_CYCLE, " sync: RIA0: %d RESI: %d RIA2: %d RIA3: %d\n",
23  ge->RIA0, ge->RESI, ge->RIA2, ge->RIA3);
24 
25  ge_log(LOG_CYCLE, " -> RIUC: %d RES0: %d RES2: %d RES3: %d\n",
26  RIUC(ge), RES0(ge), RES2(ge), RES3(ge));
27 
28  /* set NI to output the counting network.
29  * ("this occoursr alwas during the 1st phase", cpu fo.125) */
30 
31  ge->kNI.ni1 = NS_CN1;
32  ge->kNI.ni2 = NS_CN2;
33  ge->kNI.ni3 = NS_CN3;
34  ge->kNI.ni4 = NS_CN4;
35 
36  /* CO41 used to set from_zero is issued in TO10, so this looks
37  * like a reasonable place to reset this */
39 }
40 
41 static void on_TO10(struct ge *ge) {
42  ge->ffFA = ge->ffFI; /* cpu fo. 129 */
43  ge->rSA = NA_knot(ge); /* cpu fo. 128 */
44 
45  /* save SA to emulate the future state network */
46  ge->future_state = ge->rSA;
47 
48  /* TODO: a "counter" with RAMO, RAMI should count (cpu fo. 115) */
49 }
50 
51 static void on_TO11(struct ge *ge) {}
52 static void on_TO15(struct ge *ge) {}
53 
54 static void on_TO19(struct ge *ge) {
55  /* intermediate fo. 9 B1*/
56  ge->RECE = 0;
57 }
58 
59 static void on_TO20(struct ge *ge) {
60  ge->rBO = NO_knot(ge); /* cpu fo. 142, 126 */
61  ge->rVO = NO_knot(ge); /* cpu fo. 124, 125 */
62 
63  ge->kNO.forcings = 0;
64  ge->kNO.force_mode = KNOT_FORCING_NONE;
65 
66  ge->ACIC = 0; /* cpu fo. 99 */
67  ge->rRO = 0; /* cpu fo. 142 */
68 }
69 
70 static void on_TO25(struct ge *ge) {}
71 static void on_TO30(struct ge *ge) {}
72 
73 static void on_TO40(struct ge *ge) {
74  /* stub */
76  ge->kNI.ni1 = NS_CN1;
77  ge->kNI.ni2 = NS_CN2;
78  ge->kNI.ni3 = NS_CN3;
79  ge->kNI.ni4 = NS_CN4;
80  }
81 }
82 
83 static void on_TO50(struct ge *ge) {
84  /* not sure about the timing of memory ops
85  * read was previously done in TO65 with write, but
86  * it didn't work to implement the state CC for PERI.
87  * reading here seems to work in all known cases */
88  if (ge->memory_command == MC_READ) {
89  ge->rRO = ge->mem[ge->rVO];
90  ge_log(LOG_STATES, "memory read: RO = mem[VO] = mem[%x] = %x\n", ge->rVO, ge->rRO);
91 
92  ge->memory_command = MC_NONE;
93  }
94 }
95 
96 static void on_TO50_1(struct ge *ge) {
97  if (!ge->TO50_did_CI32_or_CI33) {
98  /* timing chart js1-js2-jie-ecc, fo. 32,
99  * also, display, fo. 17 */
100  ge->rBO = NO_knot(ge);
101  }
102 
104 
105  ge->kNO.forcings = 0;
106  ge->kNO.force_mode = KNOT_FORCING_NONE;
107 }
108 
109 static void on_TO60(struct ge *ge) {}
110 static void on_TO64(struct ge *ge) {}
111 
112 static void on_TO65(struct ge *ge) {
113  /* not sure about the timing of memory ops
114  * in cpu fo. 145, "write" seems to be at around TO65,
115  * and the "test k" fails if it's in TO50. */
116 
117  if (ge->memory_command == MC_WRITE) {
118  ge->mem[ge->rVO] = ge->rRO;
119  ge_log(LOG_STATES, "memory write: mem[VO] = RO = mem[%x] = %x\n", ge->rVO, ge->rRO);
120 
121  ge->memory_command = MC_NONE;
122  }
123 
124  /* "enables the second phase commands for count selection"
125  * (cpu fo. 142), not sure this is what it means */
127 }
128 
129 static void on_TO70(struct ge *ge) {
130  if (ge->PEC1)
131  ge->RASI = 0;
132 }
133 
134 static void on_TO80(struct ge *ge) {}
135 
136 static void on_TO89(struct ge *ge) {
137  ge->PEC1 = 0;
138 }
139 
140 static void on_TO90(struct ge *ge) {
141  /* TODO: check if ! is correct: PODIB should be PODI negated */
142  if (!ge->PODI)
143  ge->ACIC = 1; /* cpu fo. 99 */
144 }
145 
146 static void on_TI05(struct ge *ge) {
147  /* TODO: check if ! is correct: PODIB should be PODI negated */
148  if (ge->PODI)
149  ge->ACIC = 1; /* cpu fo. 99 */
150 }
151 
152 static void on_TI06(struct ge *ge) {}
153 static void on_TI10(struct ge *ge) {}
154 
155 static on_pulse_cb pulse_cb[END_OF_STATUS] = {
156  on_TO00,
157  on_TO10,
158  on_TO11,
159  on_TO15,
160  on_TO19,
161  on_TO20,
162  on_TO25,
163  on_TO30,
164  on_TO40,
165  on_TO50,
166  on_TO50_1,
167  on_TO60,
168  on_TO64,
169  on_TO65,
170  on_TO70,
171  on_TO80,
172  on_TO89,
173  on_TO90,
174  on_TI05,
175  on_TI06,
176  on_TI10,
177 };
178 
179 
180 void pulse(struct ge *ge)
181 {
182  if (pulse_cb[ge->current_clock]) {
184  }
185 }
@ NS_CN1
Definition: ge.h:73
@ NS_CN2
Definition: ge.h:74
@ NS_CN4
Definition: ge.h:76
@ NS_CN3
Definition: ge.h:75
void(* on_pulse_cb)(struct ge *)
Definition: ge.h:596
static uint16_t NO_knot(struct ge *ge)
Knot driven by P0, V1, V2, V4, L1, R1, V3 and L3.
Definition: signals.h:165
static uint8_t NA_knot(struct ge *ge)
Knot driven by SO or SI.
Definition: signals.h:209
void ge_log(ge_log_type type, const char *format,...)
Log message.
Definition: log.c:31
@ LOG_STATES
State trace.
Definition: log.h:21
@ LOG_CYCLE
Cycle attribution debug.
Definition: log.h:25
static void on_TO70(struct ge *ge)
Definition: pulse.c:129
static void on_TO90(struct ge *ge)
Definition: pulse.c:140
static void on_TO89(struct ge *ge)
Definition: pulse.c:136
static void on_TO50(struct ge *ge)
Definition: pulse.c:83
static void on_TO20(struct ge *ge)
Definition: pulse.c:59
static void on_TI10(struct ge *ge)
Definition: pulse.c:153
static void on_TO10(struct ge *ge)
Definition: pulse.c:41
static void on_TO50_1(struct ge *ge)
Definition: pulse.c:96
static void on_TI06(struct ge *ge)
Definition: pulse.c:152
static void on_TO19(struct ge *ge)
Definition: pulse.c:54
static void on_TO11(struct ge *ge)
Definition: pulse.c:51
static void on_TI05(struct ge *ge)
Definition: pulse.c:146
static on_pulse_cb pulse_cb[END_OF_STATUS]
Definition: pulse.c:155
static void on_TO65(struct ge *ge)
Definition: pulse.c:112
static void on_TO40(struct ge *ge)
Definition: pulse.c:73
static void on_TO80(struct ge *ge)
Definition: pulse.c:134
static void on_TO60(struct ge *ge)
Definition: pulse.c:109
static void on_TO25(struct ge *ge)
Definition: pulse.c:70
static void on_TO30(struct ge *ge)
Definition: pulse.c:71
static void on_TO64(struct ge *ge)
Definition: pulse.c:110
void pulse(struct ge *ge)
Definition: pulse.c:180
static void on_TO00(struct ge *ge)
Definition: pulse.c:8
static void on_TO15(struct ge *ge)
Definition: pulse.c:52
Signals.
uint8_t from_zero
Definition: ge.h:44
struct ge_counting_network::cmds cmds
enum knot_ni_source ni4
Definition: ge.h:87
enum knot_ni_source ni2
Definition: ge.h:85
enum knot_ni_source ni1
Definition: ge.h:84
enum knot_ni_source ni3
Definition: ge.h:86
uint8_t forcings
Definition: ge.h:50
enum ge_knot_no::@0 force_mode
The entire state of the emulated system, including registers, memory, peripherals and timings.
Definition: ge.h:94
uint8_t ALTO
Stops internal cycles.
Definition: ge.h:269
uint8_t ffFA
Special conditions register 2.
Definition: ge.h:239
uint8_t future_state
Future state.
Definition: ge.h:508
uint8_t PODI
Slow delay line.
Definition: ge.h:277
uint8_t RIA0
Synchronous CPU Cycle Request.
Definition: ge.h:462
uint8_t RIA2
Synchronous Channel 2 Cycle Request.
Definition: ge.h:476
uint8_t PEC1
Definition: ge.h:383
uint16_t rRO
Multipurpose 8+1 bit register.
Definition: ge.h:147
struct ge_counting_network counting_network
Definition: ge.h:530
uint8_t RIA3
Synchronous Channel 3 Cycle Request.
Definition: ge.h:483
uint8_t ffFI
Special conditions register 1.
Definition: ge.h:229
uint8_t RC00
Asynchronous CPU Cycle Request.
Definition: ge.h:407
uint16_t rBO
Default operator.
Definition: ge.h:164
uint8_t RC01
Asynchronous Channel 1 Cycle Request.
Definition: ge.h:420
uint8_t RECE
Selection Check Byte.
Definition: ge.h:486
struct ge_knot_ni kNI
Knot driven by counting network, or by the UA to store the result of the operation.
Definition: ge.h:140
uint8_t mem[MEM_SIZE]
The memory of the emulated system.
Definition: ge.h:528
uint8_t RASI
Channel 1 in transfer.
Definition: ge.h:367
uint8_t rSA
Future state configuration.
Definition: ge.h:218
uint8_t RC02
Asynchronous Channel 2 Cycle Request.
Definition: ge.h:435
uint8_t RESI
Synchronous Channel 1 Cycle Request.
Definition: ge.h:469
uint16_t rVO
Default memory addresser.
Definition: ge.h:155
uint8_t RC03
Asynchronous Channel 3 Cycle Request.
Definition: ge.h:450
uint8_t ACIC
Recycle delay line.
Definition: ge.h:298
enum clock current_clock
Definition: ge.h:96
enum ge::@2 memory_command
uint8_t RETO
Definition: ge.h:245
uint8_t TO50_did_CI32_or_CI33
Workaround for pulse TO50.
Definition: ge.h:560
struct ge_knot_no kNO
Definition: ge.h:134